1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a circuit and a method of generating a stable internal supply voltage in a semiconductor memory device.
2. Description of the Related Art
Semiconductor memory devices are typically used for storing data, such as still images, videos, music, and so on. Random-access memory (RAM) is a type of volatile memory, and is generally used as the main memory of a computer system. Dynamic RAM (DRAM) is a kind of RAM and includes memory cells. A memory cell may include a single cell transistor and a single cell capacitor, and may store information represented as ‘0’ or ‘1’ in the cell capacitor.
The DRAM memory cells are coupled to a word line and a bit line. When the cell transistor included in the memory cell is turned on in response to a word line enable signal, data stored in the cell capacitor is output to the bit line, or data in the bit line is stored in the cell capacitor.
One terminal of the cell capacitor included in the memory cell is coupled to the cell transistor, and the other terminal of the cell capacitor is coupled to a cell plate. A cell plate voltage VP is applied to a cell plate, and the cell plate voltage VP is generated by a cell plate voltage generator. A capacitance of the cell capacitor is related to data preservation capability, and is determined by a physical area of the cell capacitor and a voltage between both ends of the cell capacitor.
Internal supply voltages used in a semiconductor memory device may include the cell plate voltage VP used in the cell capacitor of the memory cell, and a bit-line precharge voltage VBLP.
FIG. 1 is a circuit diagram illustrating a conventional internal supply voltage generation circuit, which is disclosed in Korean Patent Laid-Open Publication No. 2004-105976. Referring to FIG. 1, the internal supply voltage generation circuit includes a reference voltage divider 10, a comparator 20 having differential amplifiers 22 and 24, and a driver 30. The internal supply voltage generation circuit generates the cell plate voltage VP of the memory cell in response to two reference voltages VRP and VRN.
Accordingly, as the DRAM devices become highly integrated, the number of memory cells to which a cell plate voltage generation device must provide the cell plate voltage is increased. Consequently, a cell plate voltage generation device capable of generating a large supply voltage is required.
Additionally, as the DRAM devices become highly integrated, the cell plate voltage may become unstable during a setup time, and the setup time may become long in the semiconductor memory device that includes the conventional internal supply voltage generation circuit.